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a) [2] Find the IEEE 32-bit single precision representation of the numbers. (Sh

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a) [2] Find the IEEE 32-bit single precision representation of the numbers. (Show major steps in computing exponent and fraction/mantissa).A = IEEE single-precision representation of (–4.6875)10B = IEEE single-precision representation of (3.75)10b) Add the numbers. The result of (A + B) should be in IEEE 32-bit single-precision format. (Show major steps)Consider two floating-point numbers: (100.1011)2 and (11.11)2 for the following two questions. Assume that these numbers are positive numbers.c)  Subtract the numbers. The result of (A – B) should be in IEEE 32-bit single-precision format. (Show major steps)a) [6] For this problem, you need to multiply the two numbers in their natural binary form (no need to convert to single precision). Consider Figure 3.3 (“First version of the multiplication hardware”) in page 184 of the textbook. Assume that the following modifications are done to the figure: Multiplicand register is 16 bits (instead of 64 bits), 16-bit ALU is used (instead of 64-bit ALU), Multiplier register is 8 bits (instead of 32 bits), and the Product register is 16 bits (instead of 64 bits). Please show the computation steps of multiplication using the following table (add as many rows as needed). In other words, please show the contents of Multiplicand, Multiplier and Product registers in each iteration. At the end of computation, the final result should be in the Product register.IterationMultiplicand (16 bits)Multiplier (8 bits)Product (16 bits)10000000001001011000011110000000000000000b) [6] For this problem, you need to divide the two numbers in their natural form (no need to convert to single precision). Consider Figure 3.8 (“First version of the division hardware”) in page 190 of the textbook. Assume that the following modifications are done to the figure: Divisor register is 16 bits (instead of 64 bits), 16-bit ALU is used (instead of 64-bit ALU), Quotient register is 8 bits (instead of 32 bits), and the Remainder register is 16 bits (instead of 64 bits). Please show the computation steps using the following table (add as many rows as needed). In other words, please show the contents of Divisor, Quotient and Remainder registers in each iteration. At the end of computation the final quotient and remainder should be in the Quotient and Remainder registers, respectively.Consider two floating-point numbers: (100.1011)2 and (11.11)2 for the following two questions. Assume that these numbers are positive numbers.a) [6] For this problem, you need to multiply the two numbers in their natural binary form (no need to convert to single precision). Consider Figure 3.3 (“First version of the multiplication hardware”) in page 184 of the textbook. Assume that the following modifications are done to the figure: Multiplicand register is 16 bits (instead of 64 bits), 16-bit ALU is used (instead of 64-bit ALU), Multiplier register is 8 bits (instead of 32 bits), and the Product register is 16 bits (instead of 64 bits). Please show the computation steps of multiplication using the following table (add as many rows as needed). In other words, please show the contents of Multiplicand, Multiplier and Product registers in each iteration. At the end of computation, the final result should be in the Product register.IterationMultiplicand (16 bits)Multiplier (8 bits)Product (16 bits)10000000001001011000011110000000000000000b) For this problem, you need to divide the two numbers in their natural form (no need to convert to single precision). Consider Figure 3.8 (“First version of the division hardware”) in page 190 of the textbook. Assume that the following modifications are done to the figure: Divisor register is 16 bits (instead of 64 bits), 16-bit ALU is used (instead of 64-bit ALU), Quotient register is 8 bits (instead of 32 bits), and the Remainder register is 16 bits (instead of 64 bits). Please show the computation steps using the following table (add as many rows as needed). In other words, please show the contents of Divisor, Quotient and Remainder registers in each iteration. At the end of computation the final quotient and remainder should be in the Quotient and Remainder registers, respectively.

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