University of Leicester, Department of Engineering EG4322/EG7017 – Programming the TMS320C50 DSP chip Dr. F.S. Schlindwein DSK_50_2020_v2.docx BASIC COMPUTER ORGANISATION AND ARCHITECTURE The first computers built (before 1944) differed in one very significant way from modern day computers: The program was stored externally and read sequentially by a paper card or paper tape reader at the time of execution. In the mid 40’s John von Neumann became involved in the project and suggested that the program could be stored electronically, inside of the computer. In 1946, in a paper entitled Preliminary discussion of the Logic Design of an Electronic Computing instrument, Burks, Goldstine and von Neumann said:

University of Leicester, Department of Engineering EG4322/EG7017 – Programming the TMS320C50 DSP chip

Dr. F.S. Schlindwein
DSK_50_2020_v2.docx

BASIC COMPUTER ORGANISATION AND ARCHITECTURE

The first computers built (before 1944) differed in one very significant way from modern day computers: The program was stored externally and read sequentially by a paper card or paper tape reader at the time of execution. In the mid 40’s John von Neumann became involved in the project and suggested that the program could be stored electronically, inside of the computer. In 1946, in a paper entitled Preliminary discussion of the Logic Design of an Electronic Computing instrument, Burks, Goldstine and von Neumann said:

“Conceptually we have … two different types of memory: storage of numbers and storage of orders. If, however, the orders to the machine are reduced to a numerical code and if the machine can in some fashion distinguish a number from an order, the memory organ can be used to store both numbers and orders.”

The two most important characteristics in the architecture proposed by von Neumann are: (i) program is stored in electronic memory; (ii) the same memory is used for program and for data. The architecture of most present day microcomputers is based on those ideas first published by John von Neumann and these are called ‘von Neumann machines’. The characteristics of a von Neumann machine are:

-program is stored in electronic memory,
-data and instructions are stored in the same physical memory,
-program can modify itself,
-memory is linear (one-dimensional) – a single memory address is sufficient to identify any position,
-instructions are accessed via an auto-increment pointer (program counter),
-instructions and data are indistinguishable,
-data has no inherent meaning.

This idea of stored program control enabled computers to perform conditional branching and allowed for the existence of loops and subroutines. The fact that data and program coexist in the same physical memory permits the practice of self-modifying code, but this is not a very healthy practice because it makes debugging very difficult. The main advantage of the von Neumann machine over the previous architecture is therefore due to the idea of stored program, and not that program and data are stored in the same physical memory.

The 320C50 Harvard architecture is named after the Harvard Mark-I computer, designed and built by Harvard physicist Howard Aiken in the late 30’s. Mark-I had data space separated from program space. The TMS320C50 uses different physical memories for data and program (both of course implemented in silicon). This allows the processor to time multiplex the program-memory instruction fetch with the data-memory reads or writes. In the best case this can double the processor throughput.

DATA MEMORY, PROGRAM MEMORY AND TMS320C50 MEMORY MAPS

The TMS320C5x digital signal processors (DSPs) constitute the newest fixed-point generation in the TMS320 family. The first devices in this generation are the ‘C50, the ‘C51 and the ‘C53. Their central processing unit (CPU) core is based upon the ‘C25’s CPU core with additional enhancements to improve overall performance. The TMS320C50 is a static CMOS digital signal processor with 10 kwords of on-chip RAM and 2 kwords of on- chip ROM. It has a ‘modified’ Harvard architecture. The modification means that the two areas of memory are not totally disjoint and there are bridges of communication. There are instructions that read information from the program memory into data memory (TBLR – table read) and from data memory to program memory (TBLW – table write); there is an immediate mode of addressing in which an operand (data) is stored in the code (LDP #
-load data page immediate – see example below), and there is a special area of memory that can be mapped as data memory (after reset or after a CNFD instruction – configure as data) or as program memory (after CNFP).

MEMORY MAPS – MICROPROCESSOR MODE (TMS320C5x User’s Guide 1993, pg. 6.3)

Program space Data space
0000h

002Fh interrupts and reserved area (external) 0000h
005Fh memory-mapped registers
0030h external 0060h on-chip
07FFh memory 007Fh DARAM B2
0800h

2BFFh on-chip SARAM (RAM=1)
or external RAM (RAM=0) 0080h
00FFh

0100h
02FFh reserved area

on-chip DARAM B0 (CNF=0)
reserved (CNF=1)
2C00 external 0300h on-chip DARAM
FDFF memory space 04FFh Block B1
FE00h FFFFh on-chip DARAM B0 (CNF=1)
external (CNF=0) 0500h
07FFh

0800h
2BFFh reserved area

on-chip SARAM (OVLY=1) external (OVLY=0)
2C00h FFFFh external memory space

For the DSK module we shall normally load our programs starting from 0A00h and data from 0F00h.

DATA MEMORY ACCESS – THE PAGED MEMORY AND DIRECT ADDRESSING

The TMS320C50 can address 64k words of data memory. Because 64k positions would require 16 bits for addressing, Texas instruments decided to organise the memory as 512 blocks of 128 words each, and when using direct addressing mode the programmer would first specify the page and then use the memory within that page, giving only an off-set address (off-set from the base address of the particular page).

The data page can be selected with the command ‘load data page immediate’, for instance

LDP #2 ; for loading the data page register with page 2 (base address = 100h)

therefore page 0 corresponds to positions 0 to 127 (7Fh), page 1 to positions 80h to 0FFh, and page 2 to 100h to 17Fh. After specifying the page, whenever the programmer uses direct addressing mode the DSP assumes that all accesses are made to that particular page and the address (for the 128 positions) only needs 7 bits and can be packed together with the op-code for instructions such as ‘load accumulator, or ‘store accumulator’.

The following program uses immediate addressing mode to select page 2, and then direct addressing to write 1 to data memory 100h, 101h and 17Fh:

LDP #2 ; Page 2 (base address = 0100h)
LACC #1 ; Load accumulator immediate with value 1
SACL 0 ; Save accumulator to memory position 0 in the current page (100h)
SACL 1 ; Save accumulator to memory position 1 in the current page (101h)
SACL 7Fh ; Save accumulator to memory position 7Fh in the current page (17Fh)

Notice that the arguments can be in decimal (default), hexadecimal (as on 7Fh), or binary.

ADDRESSING MODES – INDIRECT ADDRESSING

There are three modes of addressing available on the 320C50:

1.Immediate (argument follows with a # in front, i.e., argument is in program memory)
2.Direct (using a data page and addressing using off-set only)
3.Indirect

Examples of immediate and direct addressing mode have been given above.

An alternative addressing mode, which is offers a very powerful and efficient way of dealing with arrays is also provided: the indirect addressing mode makes use of one of the eight Auxiliary Registers to address the memory. It is done like this: First we select which of the eight Auxiliary Registers we want to use, then we load the address we want to access into that register, and finally we use it:

LARP AR7 ; Load Auxiliary register pointer with 7, i.e., choose register 7
LAR AR7,#074Fh ; Load Auxiliary Register Long Immediate
LACC * ; Load accumulator with content of memory 74Fh

The method of indirect addressing allows auto-increment, auto-decrement, and re-loading of ARP with a different register in the same single instruction and shows its muscle in do-loops such as:

* Let’s copy 20 values from 820h onwards into the internal memory of the chip 100h onwards
*
LARP 1 ; Use AR1 as pointer of source
LAR AR0,#19 ; AR0 = Number of values -1
LAR AR1,#820h ; AR1 = pointer of source values starting in 820h
LAR AR2,#100h ; AR2 = pointer of destinations starting in 100h
CCRRL LACC *+,0,AR2 ; Notice the auto-increment, zero-shifts, and ARP=2
SACL *+,0,AR0 ; Notice the auto-increment, zero-shifts, and ARP=0
BANZ CCRRL,*-,AR1 ; Branch if AR0 not zero, decrement AR0, ARP = AR1

The same result of the extract of program above could be obtained using a ‘Block-move’ instruction (TMS320C5x User’s Guide 1993, pg. 6.37).

INTERRUPT VECTORS AND PRIORITIES:

Interrupt name Vector priority function
RESET 0 1 (highest) external reset signal
INT1 2 3 external user interrupt #1
INT2 4 4 external user interrupt #2
INT3 6 5 external user interrupt #3
. . . .
. . . .
. . . .
INT16 32 (20h) 18 external user interrupt #2
TRAP 34 (22h) N/A TRAP instruction vector
NMI 36 (24h) 2 nonmaskable interrupt
RINT 080Ah 7 serial port receive interrupt
XINT 080Ch 8 serial port transmit interrupt

(TMS320C5x User’s Guide 1993, p. 5-5)

SOME MEMORY MAPPED REGISTERS (TMS320C5x User’s Guide 1993, pg. 6-14-6.15)

Register name Address location Definition

IMR 4 (4h) interrupt mask register (pg. 5-6)
GREG 5 (5h) global memory allocation register
DRR 32 (20h) serial port data receive register
DXR 33 (21h) serial port data transmit register
SPC 34 (22h) serial port control register
TIM 36 (24h) timer current count register
PRD 37 (25h) timer period register
TCR 38 (26h) timer control register

INTERRUPT MASK REGISTER (TMS320C5x User’s Guide 1993, pg. 5-6)

bit number: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
————— reserved —— INT4 TXNT TRNT XINT RINT TINT INT3 INT2 INT1

PRODUCT MODES (pp. 3-41, 4-220, TMS320C5x User’s Guide 1993)

00 No shift ; normal, ‘vanilla’ use
01 left shift 1 bit ; for use when using fractions with Q15 notation
10 Left shift 4 bits ; for use with MPYK, which uses 13 bits (Q12 * Q15 = Q27)
11 Right shift 4 bits ; to avoid overflow when using MAC with up to 128 products

TMS320C50 INTERNAL TIMER OPERATION (TMS320C5x User’s Guide 1993, pg. 5-45-5.47, 6-15)

The TMS320C50 provides an on-chip timer, which can be used for measuring the time taken by a routine of your code to run or to synchronise events. The on-chip timer is a down counter that is continuously clocked by CLKOUT1 from the TMS320C50 (clock/2). The timer has three 16-bit registers associated to it: PRD, TDDR and TIM. PRD and TIM are set to 0FFFFh on reset while TDDR is set to zero. The TIM register decrements at frequency CLKOUT1 after the reset signal is de-asserted and its value can be read at any time from data memory location 24h. The timer is reloaded with the value contained in the period (PRD) register within the next cycle after it reaches zero so that interrupts can be accurately programmed to occur at regular intervals of [(PRD+1)*(TDDR+1)] cycles of CLKOUT1 (which has the frequency of the crystal / 2 = 20 MHz for the DSK board). The PRD is memory mapped at address 25h.

The timer can be used to generate sample clock for an analogue interface:

*Using the internal timer to generate a clock at a rate of 50 kHz:
*CLKIN frequency = 40 MHz => timer (CLKOUT1) = 20 MHz.
*TDDR=0 after reset.
*
LPP
SETC #0
INTM ; mem-mapped registers are on page 0
; global interrupt disable
SPLK #399,PRD ; timer period (20 MHz / 400 = 50 kHz)
OPL #8,IMR ; set timer interrupt mask bit
SPLK #20h,TCR ; reload and start timer
SPLK #10000B,IFR ; clear any pending timer interrupts
CLRC INTM ; global interrupt enable

In the program ECHOINT.ASM the timer is used to generate a 10 MHz clock to the Analogue Interface Chip (AIC) by merely starting the timer and letting it run with the timer reload bit (TRB) of the timer control register (TCR, see pg. 5-46) set to 1, to reload timer with period after timeout:

AICINIT: SPLK #20h,TCR ; To generate 10 MHz from Tout SPLK #01h,PRD ; for AIC master clock

The internal timer can also be used to measure the time taken to run some part of your code:

*
*read time and calculate interval
*
TIM EQU 24h ; internal timer memory mapped address
PAGE30 EQU 30 ; base address 0F00h
TIME0 EQU 18h ; off-sets for variables
TIME1 EQU 19h
TIMED EQU 1Ah

LDP #PAGE30 ; base address 0F00h
LAMM TIM ; read TIM value (TIM is memory mapped)
SACL TIME0 ; Initial time in TIME0
.
. your program goes here!!
.
LAMM TIM ; read TIM value
SUB TIME0 ; Acc = current time – initial time
NEG ; Internal timer counts down @ 20 MHz SACL TIMED
*

YOUR LAB EXERCISES:
Exercise 1 – familiarising with the DSK and the Assembler and loader programs:
The following text explains how to run application code on the DSK using either the DSK debugger / monitor (DSK5D.EXE) or the DSK Loader (DSK5L.EXE).

The TMS320C5x DSK software package contains applications code for testing the DSK memory, setting up the AIC and testing out the host/target communications interface. The three application programs are listed below:

I.SELFTEST.OUT ==> Automatic test file for the DSK board.
II.FUNC.DSK ==> This file allows you to check the AIC.
III.DSK_SPEC.DSK ==> Allows you to display the spectrum of the analogue input
signal on an oscilloscope.

I.SELFTEST.OUT
============
1.Connect the DSK to the mains and to the RS232 serial port and copy SELFTEST.OUT under the working directory.

2.Run the test file by executing the DSK loader with the following parameters:
DSK5L -A -C1 (If using serial port 1)
DSK5L -A -C2 (If using serial port 2)

The parameters passed to DSK5L tell the program to automatically load the file SELFTEST.OUT and execute. First DSK5L will fill the DSK internal memory with a specified pattern then read them out to check the DSK memory. After memory test the SELFTEST is loaded and used to test the AIC. If any test failed or the test is finished DSK5L will stop execution.

3.A good DSK will respond with the following messages:

DSK5L: TMS320C50 Loader Programme Version 1.02 / 15.AUG.94 Copyright (c) 1993/4 Texas Instruments
DSK-RS232 LOOP PASSED
Check Data Memory B0 0x0100 0x0300
>>>>>>>> PASSED

Check Data Memory B1 0x0300 0x0500
>>>>>>>> PASSED
Check Data Memory SARAM 0x0a00 0x2c00
>>>>>>>>>>>>>>>>> PASSED
AIC test Send -> 0xb000 Receive -> 0x8000 PASSED!
Your DSK already passed the test !!!

4.If any of the tests fail a ‘TEST FAILED’ message will be generated and DSK5L will stop execution. If the RS232 serial link cannot be established, DSK5L will likely not load and SELFTEST will not be attempted. If there are problems, please consult Chapter 2 of the TMS320C5x DSP Starter Kit User’s Guide.

II.FUNC.DSK
========
1.Connect the DSK to the PC via RS232 serial port. Connect a small, low power speaker or an oscilloscope
to the DSK analogue output BNC.

2.Load and run the DSK program by typing the following:

DSK5L FUNC.DSK

It should run and show a random signal on the oscilloscope. If it does not run verify the serial communications port cable. The program checks that the PC’s baud rate is the same as the baud rate of the DSK.

3.The default set-up for FUNC.DSK is to generate random noise. Load it (DSK5L FUNC.DSK and you will hear (see on the scope) the random noise from the audio output port. Changing the value of SIN_SW and recompiling and re-loading the new code will generate a sinusoid output. This is done by editing the source code and recompiling it. Using the editor on the source ‘FUNC.ASM’ (EDIT FUNC.ASM):

change
SIN_SW .word 00000h ; 0 -> random noise
; 1 -> sine wave

to read
SIN_SW .word 00001h ; 0 -> random noise
; 1 -> sine wave

recompile (cross-assemble, actually):
DSK5A FUNC

and re-load the code into the DSK:
DSK5L FUNC.DSK

You should now see a nice sinusoid on the oscilloscope.

4.Changing the sampling rate will generate a different frequency of sine wave. To do this you need to change the contents of TA and RA (in the source file) and recompiling and re-loading. These two positions contain the values that are loaded by the program to the TA and RA registers of the AIC. (For more information on how the AIC determines the sampling rate please refer to Appendix B of the DSK User’s Guide). After modifying the TA and RA registers (try the values TA=000Fh and RA=000Fh – for instance. Check the manual later on to see what this does). Recompile and restart the program from the beginning in order to re-initialise the AIC with the new TA and RA values.

Modify
TA .word 24 ;
RA .word 24 ;

to read
TA .word 0Fh ;
RA .word 0Fh ;

Recompile (cross-assembly):
DSK5A FUNC

And re-load the code into the DSK:
DSK5L FUNC.DSK

You should now see a sinusoid with a different frequency.

Exercise 2 – A/D, D/A, interrupts, ECHOINT.ASM and ECHOINT.DSK:
The program ECHOINT given is an example on how to use the internal timer and the AIC to start A/D conversions and generate interrupts. The ECHOINT program …
-programs the timer to drive the AIC clock at 10 MHz.
-programs the AIC to sample and convert the analogue input.
-programs the interrupt mask enabling RINT.
-puts a branch to its Interrupt Service Routine in address 080Ah (RINT address on DSK)
-enables interrupts
In the ISR a value is read from the A/D and echoed to the D/A.

2.1– Assemble the program ECHOINT from its source. To assemble ECHOINT.ASM into ECHOINT.DSK you need the cross-Assembler program DSK5A.EXE. The command is simply

DSK5A ECHOINT

2.2- Try the program:

DSK5L ECHOINT.DSK -C2 (or -C1)

2.3- Read the source code of ECHOINT and make sure you understand the ISR, especially the LAMM and the SAMM instructions. Follows the extract for the ISR of the receiver serial interrupt (RINT):

RINT: PUSH ; We are going to change the accumulator LAMM DRR ; Load Acc with Data Rx Register (i.e. read A/D) AND #0fffch ; IMPORTANT!! Make d00=d01=0
SAMM DXR ; Store Acc into Data Tx Register (echo to D/A) POP ; restore Acc
XINT: NOP
NOP
RETE ; return from interrupt & re-enable interrupts

2-4 Given (Appendix B of the TMS320C5x DSP Starter Kit User’s Guide on the AIC chip) that the sampling

frequency is given by

f sam

 MCLK
2  RA  RB

, and knowing that the master clock was programmed to be MCLK

= 10 MHz (please take my word for it), calculate the sampling frequency fsam from the values programmed by the ECHOINT program into the AIC registers RA and RB.

Obs: given that there is a reconstruction low-pass filter on the D/A part of the AIC whose cut-off frequency is

Flp

 MCLK , make sure that Flp is greater than fsam/2, that is, make RA small if you don’t want to see this
80  RA

low-pass becoming too aggressive. NB: This is NOT your filter it is just to smooth out the D/A output!

Exercise 3:

Modify the sampling frequency of ECHOINT to sample at fsam = 10 kHz (change the values of RA and RB to appropriate vales – see above – and recompile). Now enter an analogue sinusoid, from the signal generator, with frequency of about 500 Hz. Observe it on the oscilloscope. Now change the frequency of the sinusoid to around 5 kHz on the signal generator and read the frequency of the sinusoid from the oscilloscope. What value did you

get on the oscilloscope? Change the frequency of the signal generator to frequencies above and below 5 kHz and observe the oscilloscope (try 6000 Hz, for instance). Any unexpected behaviour? Map the perceived frequency (oscilloscope) in relation to the actual frequency (signal generator). Is is a 45 degree line?. Explain carefully what aliasing is and its effects when using (i) fsam > 2 fmax and (ii) fsam < 2 fmax , where fmax is the maximum frequency component of the analogue signal being sampled. Exercise 4: The program FILT1 given is a simple modification of ECHOINT. In FILT1 the interrupt service routine RINT i)reads a sample from the A/D (LAMM DRR), ii)applies a low-pass filter to the input signal x(n) using the equation y(n) = a0 x(n) + a1 x(n-1) +a2 x(n-2) + a3 x(n-3) with a0 = a1 = a2 = a3 = 0.25, that is, y(n) = [x(n) + x(n-1) + x(n-2) + x(n-3)] / 4, and then iii)echoes the result y(n) to the D/A (SAMM DXR). 4.1- Try the program out and observe the result on the oscilloscope: DSK5L FILT1.DSK -C2 4.2- Read the source code of FILT1.ASM and make sure you understand the ISR RINT, especially the DMOV instructions. Follows the extract for the ISR of the receiver serial interrupt (RINT): RINT: PUSH ZAC ; save accumulator ; Acc = 0 LDP #X0 ; load data page of X0 DMOV X2 ; X2 becomes X3 DMOV X1 ; X1 ages to X2 DMOV X0 ; X0 -> X1
LAMM DRR ; Load Acc with Data Rx Register (i.e. read A/D)
SACL X0 ; Save new sample onto X0
ZAC ; Acc = 0
ADD X0 ; add the 4 last samples
ADD X1
ADD X2
ADD X3
SFR ; divide by two
SFR ; and again, i.e. y(n) = y(n) / 4
AND #0fffch ; IMPORTANT!! Make d00=d01=0
SAMM DXR ; Store Acc into Data Tx Register (echo to D/A)
POP ; restore Acc
XINT: NOP
NOP
RETE ; return from interrupt & re-enable interrupts

4.3- Now modify the program (copy FILT1.ASM into FILT2.ASM first and then work on FILT2.ASM) by implementing the FIR filter with the multiplications explicit in the code, that is,

y(n) = a0 x(n) + a1 x(n-1) +a2 x(n-2) + a3 x(n-3)

This will make the FIR filter generic (actual coefficients rather than two shift rights…)

To modify the program you need a text editor (such as Microsoft EDIT). To assemble FILT2.ASM into FILT2.DSK you need the cross-Assembler program DSK5A.EXE. The command is simply

DSK5A FILT2

Use some data memory positions for both the samples and the coefficients with the weights all equal to 0.25 (moving average, low-pass). Obs: In Q15 notation 0.25 is written as 8192 because all values (assumed to be within the interval -1 to +1 are normalised to fit the 16 bits available, therefore +1 is represented as 7FFFh and – 1 as 8000h and all integer values are interpreted as fractions whose actual value is the number stored divided by the scaling factor (32k for Q15 notation). Got that?

Please read a brief explanation about a few special instructions:

SPM 1 sets Product mode to 1. This means that all products are left-shifted one position for correcting the result to fit into the 32 bits of P using Q30 notation. This is done when using the Q15 and 31 notation for making the best possible use of the 16 bit values available to represent fractions. Try to multiply +1 by +1 in the Q15 notation. You get 7FFFh * 7FFFh, and when you do it you will see that you’ve got two zeroes as the most significant bits, i.e., the sign bit gets duplicated. If you try to read this number in Q31 notation it will be +0.5 and not the +1 we would like to see there. In other words Q15 * Q15 = Q30 and not Q31. And because we are to save as the result the 16 most significant bits of the result (SACH) we use SPM 1 to give us the extra shift left. Alternatively we could have done it with no shifts on the P register, but one shift when saving: SACH YN,1.

LT = load T with the content of data memory addressed by MPY = multiplies T by contents of data memory addressed by APAC = add P to Acc

The LTD instruction does the following:
1)PC = PC+1 (program counter is incremented)
2)T register is loaded with value in data memory
3)copy contents of the data memory into next memory position
4)Acc = Acc + P register

Use the following code as a starting point:

.ds 0F00h
A0 .word 8192
A1 .word 8192
A2 .word 8192
A3 .word 8192
X0 .word 0
X1 .word 0
X2 .word 0
X3 .word 0
Y0 .word 0
SPM 1 ; to correct for the multiplications (Q15*Q15 = Q30)
LDP #X0 ; data memory base-address = F00h
FIR ZAC ; initialise Accumulator to zero (ZERO ACC)
LT X3 ; load T with X3
MPY A3 ; P = a3 x(n-3)
LTD

MPY X2

A2 ; LTD = accumulate previous P into Acc so that Acc = a3 * x(n-3),
; load T with X2, and DMOV X2 to X3, i.e., ‘age’ it (* 1/z)
; Acc = a3 x(n-3), P =a2 x(n-2)
LTD X1 ; Acc = a2 x(n-2) + a3 x(n-3), T = X1, X1 moved to X2
MPY A1 ; P = a1 x(n-1)
LTD X0 ; Acc = a1 x(n-1) +a2 x(n-2) + a3 x(n-3), T = X0, X0 ‘aged’
MPY A0 ; P = a0 x(n)
APAC ; Acc = a0 x(n) + a1 x(n-1) +a2 x(n-2) + a3 x(n-3)
SACH Y0 ; Save result onto y(n)
LAC Y0 ; bring it into low ACCU
AND #0fffch ;IMPORTANT!!. Make d00=d01=0

SAMM DXR ; Store Acc into Data Tx Register (echo to D/A)
LAMM DRR ; Load Acc with Data Rx Register (i.e. read A/D). Sample x(n) SACL X0 ; Read new input value. Notice how all others ‘aged’
POP ; restore Acc
XINT: NOP
NOP
RETE ; return from interrupt & re-enable interrupts

make the sampling frequency equal to 10 kHz, save your program as ‘FILT2.ASM’, compile it, load it and check the zeroes of the filter by sweeping the frequency of a sinusoid.

Exercise 5:

The program you have written for exercise 4 (FILT2) applies a low-pass filter to the input signal x(n) using the general FIR equation

N1
yn  ak xnk k0

with N=3 in this particular case (4 coefficients: k=0 to N-1).

All filter coefficients were equal ak=0.25. This is clearly not the general case as they can have any value. Modify the code to implement a better low-pass transfer function (many solutions/improvements possible here!), with 15 coefficients rather than 4. Hint: Use my program firfilt.m, for MATLAB to obtain the coefficients for the filter.

Exercise 6:

The program you have written for exercises 4 (FILT2) and 5 (FILT3) applies a low-pass filter to the input signal x(n) using the general FIR equation

N1
yn  ak xnk k0

but it does the multiplications one by one, using in-line code. Clearly you would not want to write this kind of code for a long filter, one with80 coefficients for example, or 500 coefficients. Examine the code for ‘LOPASS.ASM’ which implements a filter of 80 coefficients using the ‘repeat’ instruction as below and modify your code accordingly.

LAR AR0,#XNLAST ; load AR0 with address of last element
ZAP ; ZERO ACC AND PRODUCT REGISTERS
MAR *,AR0 ; AR0 is the current AR register.
RPT #79 ; Repeat the next instruction 80 times
MACD #a0,*- ; the complete coefficients table.
APAC ; Accumulate the last product

(hint: read MACD_instruction_and_recursive_filters.docx, available in Blackboard, as it will help… a lot!).

Exercise 7:

Now modify the code to implement a high-pass transfer function, with 21 taps (21 coefficients). Hint: Use my firfilt program again – choose order 10, as the program only lists the coefficients for the centre frequency and then one half of the ‘sinc’ function… Remember you have to use all of them.

Exercise 8:
Modify the code to a general recursive structure capable of implementing either FIR or IIR filters, i.e. one that filters the signal according to the general expression.

N 1 M 1
yn   ak xnk  bk ynl
k 0 l 1

Test it with the 2 examples below:

8.1
yn = yn-1 + 0.25 xn – 0.25 xn-4

8.2
…and with the filter that implements the following z-transfer function:

0.417 ??4 − 0.5484 ??3 + 1.0143 ??2 − 0.5484 z + 0.417

??(??) =

??4 − 0.8084 ??3 + 0.6392 ??2 − 0.2883 z + 0.2091

NUMdp = 0.4170 -0.5484 1.0143 -0.5484 0.4170
DENdp = 1.0000 -0.8084 0.6392 -0.2883 0.2091

For the sampling rate of 10 kHz, plot the frequency response for (8.1) and for (8.2) from DC to 5 kHz.

Hint: 1.0143 = 1 + 0.0143 = 0.5071 + 0.5072
.
All references to pages are from: – TMS320C5x User’s Guide, Texas Instruments, 1993.

Hope you have enjoyed the lab sessions!

9.Extra item / Question [equal marks for (a) to (d)]

(a)Explain why a linear buffer for data acquisition (such as the one we used in the laboratory sessions) is useful for implementing real-time signal processing. Mention in your answer which instructions of the DSP chip you used take advantage of this linear, sequential data structure.

(b)Explain why a circular buffer for data acquisition is particularly useful for implementing real-time signal processing in situations where the processing time is context dependent. If your DSP does not have a specific instruction to increment a pointer circularly, explain how you would deal with the pointer for implementing this circular increment operation (for example, for a buffer size of 256 positions).

(c)You are designing a data acquisition and processing system to process the electrocardiogram (ECG) of patients in an intensive care cardiac unit and you are planning to use a circular buffer for the ECG. The sampling rate used for the electrocardiogram signal was 500 Hz. What size (number of samples) would you design your circular buffer to be? Discuss the reasoning for your choice.

(d)When a microcomputer (or a DSP) services an interrupt, it jumps (branches) to a portion of code called ‘interrupt service routine’ (ISR). The last instruction of an ISR is a ‘return from interrupt’ or ‘return from exception’, RETE. Explain how a microcomputer (or a DSP) is able to return to the exact instruction of code it was about to execute when the interrupt was acknowledged and the branch occurred. Discuss what this has to do with the pairing of PUSH and POP instructions used inside an ISR to save/restore variables of the main code.

EG4322/EG7017 Assessment // DSK_50_2020_v2.docx
Dr. Fernando S. Schlindwein